In this workshop studets will learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting embedded applications.

The emphasis of this course is on using OpenCL™ APIs to run hardware kernels on Alveo™ accelerator cards, scheduling hardware kernels and controlling data movement by using OpenCL APIs and the Xilinx Runtime library for embedded platforms, demonstrating the Vitis environment GUI flow and makefile flow for both data center and embedded applications, describing the Vitis platform execution model and XRT, describing kernel development using C/C++ and RTL, analyzing reports with the Vitis analyzer tool and optimizing designs.

After completing this workshop, you will have the necessary knowledge to:

• Describe how the FPGA architecture lends itself to parallel computing
• Explain how the Vitis unified software environment helps software developers to focus on applications
• Describe the Vitis (OpenCL API) execution model and XRT native APIs
• Analyze the OpenCL API memory model
• Create kernels from C, C++, or RTL IP using the RTL Kernel Wizard
• Apply host code optimization and kernel optimization techniques
• Move data efficiently between kernel and global memory