News da MINDWAY-DESIGN.COM http://www.mindway-design.com Sat, 22 Nov 2008 04:32:32 +0100 FeedCreator 1.7.2 http://www.mindway-design.com/news.php?action=details&id_news=28 ]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=27 DVB-T/H modulator and a gigabit Ethernet VoIP bridge (with embedded DVB-ASI SerDes and full-hardware IP protocol stack).
These cores, mapped over Spartan 3 or Spartan 3A DSP FPGAs, demonstrate broadcast-quality transmission chains to commercial DVB and IPTV receivers.
The combination of MindWay cores and Xilinx silicon offer a cost-effective way of providing high performance transmission solutions and reducing overall cost per channel for terrestrial, mobile and IPTV networks.]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=26 Mindway, a Xilinx Alliance Program partner, offers the largest IP core portfolio for Audio, Video, Broadcast, Internet Protocol and Telecom applications, with special focus on Digital Television solutions.
Mindway at stand 10.F30 (co-exhibiting with Xilinx Inc) will present his IP core portfolio including DVB-C, DVBT/H, DVB-S, DVB-S2, ATSC Modulators, Digital Precorrection, SFN, ASI Serdes Interface, VoIP COP3, Mpeg1 Layer II, MP2 Compressor, 1Gbit/s IP Hardware Protocol Stack, 1Gbit/s Data Over IP, 1Gbit/s Video Over IP and many others IP Core.]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=19 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=18 ]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=25 The MW_DVB-T/H_A Interface Core performs Transport Stream rate adaptation receiving MPEG-2 Transport Stream data from an ASI or SPI input channel receiver and providing a constant and continuous data stream to the MW_DVB-T/H Modulator Core, in order to match the required modulator on-air Symbol Rate. Thus it is possible for the input Transport Stream rate to be greater than the required on-air rate provided the true Transport Stream packet content (i.e. non NULL TS packets) is still less than the on-air rate.The interface removes incoming NULL packets and store the meaningful packets in a temporary buffer. When the MW_DVB-T/H Modulator Core is ready to receive new data, if in the buffer there is a complete Transport Packet, the packet is trasferred to the DVB-T/H modulator, otherwise a NULL packet is generated. The MW_DVB-T/H_A Interface Core allows Transport Stream data to be input at any rate from 3.5Mbit/s to 35Mbit/s.


Brochure available for the download Xilinx IP Center]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=17 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=24 The MW_DVB-T/H_FP Filter Core performs Linear and Non-Linear Precorrection, Gain Control and Out-of-Band Filtering, receiving data from MW_DVB-T/H_P Modulator Core and providing complex I/Q symbol pairs which should be supplied to an external upconverter.


Brochure available for the download Xilinx IP Center ]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=22 The MW_DVB-T/H_F Filter IP Core performs Gain Control and Out-of-Band Filtering, receiving data from MW_DVB-T/H Modulator Core and providing complex I/Q symbol pairs which should be supplied to an external upconverter.


Brochure available for the download Xilinx IP Center]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=20 MW_ATSC IP core performs the digital baseband functions required for the transmission side of a 8-VSB Broadcasting link. The core implements the framing functions as defined by ATSC A/53, including the additional features for 16VSB. It accepts a single, SMPTE 310 or DVB-ASI, MPEG-2 formatted transport stream and produces complex I/Q symbol pairs which should be supplied to an external upconverter.

Brochure available for the download Xilinx IP Center]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=21 The MW_DVB-T/H Modulator IP Core performs the digital baseband functions required for the transmission side of a Digital Video Broadcasting Terrestrial link. The core implements the framing functions as defined by ETSI EN 300 744 V1.5.1 (2004-11), including the additional features for DVB-H as defined in the annex F. It accepts a single, or pair in hierarchical transmission mode, MPEG-2 formatted transport stream(s) and produces complex I/Q symbol pairs which should be supplied to an external upconverter.


Brochure available for the download Xilinx IP Center ]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=23 The MW_DVB-T/H_P Modulator IP Core performs the digital baseband functions required for the transmission side of a Digital Video Broadcasting Terrestrial link. The core implements the framing functions as defined by ETSI EN 300 744 V1.5.1 (2004-11), including the additional features for DVB-H as defined in the annex F. It accepts a single, or pair in hierarchical transmission mode, MPEG-2 formatted transport stream(s) and produces complex I/Q symbol pairs which should be supplied to an external upconverter.


Brochure available for the download Xilinx IP Center]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=8 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=16 MW_DVB-VoIP IP core converts and bridges Transport Streams (TS) convoyed by DVB standard channels (such as DVB-ASI or Parallel SDI) to IP packets, according to Pro-MPEG forum specifications.
MW_DVB-VoIP provides genuine high throughput through 1 Gbit/S MAC engine and HW-only handling of IP protocol stack. Set-up of connections and management is implemented by inexpensive MicroBlaze processing core, with no requirement for OS or SW protocol stack.

Brochure available for the download Product/Broadcasting/VoIP]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=15 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=14 - No external deserializer devices are required
- Several instances of the core can be mapped in the same low-cost FPGA

Brochure available for the download: Products/Broadcast]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=13 http://press.xilinx.com/phoenix.zhtml?c=212763&p=irol-newsArticle&ID=1049132&highlight=]]> info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=12 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=11 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=10 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100 http://www.mindway-design.com/news.php?action=details&id_news=9 info@mindway-design.com NEWS Fri, 21 Nov 2008 23:00:00 +0100