MW_DVBC Modulator Core

General Description

The MW_DVBC modulator  core  performs the  digital  baseband  functionality  for  the transmission  side  of  Digital  Video Broadcasting Cable link. The modulator core implements the framing functions  as  defined  by  ETSI  EN  300 429 V1.2.1 (1998-04). It  is  configurable  to  supports  all  several configurations  regard  to  constellation,  , 16QAM,  32QAM,64QAM,  128QAM  and 256QAM. Microblaze or  external processor  interface,with status and control registers, is available for controlling and managing the core. TS over IP, for IP based contribution, or ASI contribution are available. A direct  interface  with  Analog  Devices AD9789,  covering  VHF-UHF  bands  is available. Internal 20-bit architecture for high level MER and BER performances. FPGA  netlist  only  or  complete  design environment package are deliverable.

Support

The core, delivered as is, is warranted against defects for two years from the date of purchase. Sixty days of phone and email technical support are included, starting from the delivery date.

Deliverables

The following deliverables are available:

• FPGA netlist and Xilinx ISE or Vivado® Design Suite constraint files
• User guide
• Block level design document
• VHDL test bench and test vectors

Optional deliverables:

• Fully synthesizable VHDL source code
• Synthesis script for XST
• tcl script for Vivado® Design Suite